The invention relates to a tracking circuit for tracking the voltage potential of an insulation well which is provided for the insulation of an integrated component embedded therein from a substrate.
FIG. 1 shows a sectional view through an integrated vertical PNP transistor which is embedded in an n-doped insulation well. The integrated vertical PNP transistor illustrated in FIG. 1, according to the prior art, can be fabricated in a BICMOS process. In the case of the vertically integrated bipolar transistor, the current flows perpendicularly to the orientation of the substrate body. The current flows from a p+-doped emitter region through an n-doped base region to a p-doped collector region. The p+-doped emitter region is connected to an emitter terminal E, the n-doped base region is connected to base terminals B and the p-doped collector region is connected to collector terminals C. The n-doped insulation well is connected to a terminal I for controlling the potential of the n-doped insulation well. The p-doped semiconductor substrate is connected to a substrate terminal S. The integrated transistor is surrounded by the n-doped insulation well which insulates the integrated transistor from the surrounding semiconductor substrate. Between the p-doped collector region and the n-doped insulation well there is a PN junction, which forms a parasitic diode Da. Between the p-doped semiconductor substrate and the n-doped insulation well there is a further PN junction, which is represented as a parasitic diode Db. The two diodes Da and Db each have breakdown voltages which are prescribed by various parameters, such as, for example, doping, geometry and temperature. In the case of a vertical bipolar transistor fabricated using BICMOS technology, the breakdown voltage of the diode Da is about 18 volts, while the breakdown voltage of the diode Db is about 30 volts. In order that the n-doped insulation well insulates the integrated transistor embedded therein from the p-doped semiconductor substrate, the n-doped insulation well must always have a higher potential than the p-doped collector region and the p-doped semiconductor substrate. In order that this condition is met, in the case of conventional circuits, the insulation well is terminated via the insulation well terminal I to the positive supply voltage +VDD and the semiconductor substrate is terminated via the substrate terminal S to the negative supply voltage VSS. This ensures that the two PN junctions Da and Db are always operated in the reverse direction, thereby ensuring an insulation of the integrated transistor from the semiconductor substrate. To ensure that there is no electrical breakdown of the n-doped insulation well in the collector region at the PN junction Da, the supply voltage +VDD must always be lower than the breakdown voltage of the diode Da operated in the reverse direction, i.e. the maximum supply voltage is about 18 volts.
In the case of conventional circuits, the supply voltage VDD applied to the n-doped insulation well must meet the following conditions:                                                                                           V                  DD                                ≤                                  U                  DA                                                                                                                          V                  DD                                ≤                                  U                  DB                                                                    }                            (        1        )            
where UDA is the breakdown voltage of the PN junction between the collector region of the transistor and the insulation well and UDB is the breakdown voltage of the PN junction between the semiconductor substrate and the insulation well.
Furthermore, the collector-emitter breakdown voltage UCED between the p-doped collector region and the p+-doped emitter region is not permitted to be exceeded, the collector-emitter breakdown voltage typically being about 30 volts.
Since the breakdown voltage of the PN junction Da is generally lower than the breakdown voltage of the PN junction Db, the maximum supply voltage for an integrated circuit constructed from vertical bipolar transistors is limited by the breakdown voltage UDA, which is about 18 volts. On account of the limited supply voltage VDD, the output voltage levels of a circuit constructed from integrated transistors of this type is likewise limited to the breakdown voltage of the PN junction. However, higher voltage level swings are necessary in many applications. By way of example, a full rate ADSL driver circuit requires a voltage swing of 24 volts.
Therefore, the object of the present invention is to provide a device which allows integrated components which are fabricated in simple standard technologies to be operated with a higher supply voltage in order that a higher voltage level swing is achieved.
This object is achieved according to the invention by means of a tracking circuit having the features specified in Patent Claim 1.
The invention provides a tracking circuit for tracking the voltage potential of an insulation well for the insulation of an integrated component embedded in the insulation well, in particular of a transistor, from a substrate, the voltage potential of the insulation well being tracked in a manner dependent on a signal voltage output by the integrated component in such a way that the voltage difference between the applied signal voltage and the tracked voltage potential is lower than a predetermined breakdown voltage between the integrated component and the insulation well.
The insulation well is preferably embedded in the substrate.
The integrated transistor is preferably a bipolar transistor.
The integrated bipolar transistor is preferably a vertical bipolar transistor.
The vertical bipolar transistor preferably has a first doping region as emitter terminal, a second doping region as base terminal and a third doping region as collector terminal,
the second doping region lying between the first and third doping regions and having an opposite doping to the first and second doping regions.
The insulation well preferably encloses the third doping region.
The breakdown voltage between the substrate and the insulation well is preferably higher than the breakdown voltage between the third doping region and the insulation well.
The tracking circuit preferably has an input for receiving the signal voltage applied to the integrated transistor and an output for connection to the insulation well of the integrated transistor.
In a particularly preferred embodiment, the tracking circuit has a tracking transistor, which is constructed complementarily to the integrated transistor.
The tracking transistor is preferably a bipolar transistor.
In a particularly preferred embodiment of the tracking circuit according to the invention, the tracking transistor has a collector terminal, which is connected to the output of the tracking circuit, an emitter terminal, which is connected to the input of the tracking circuit, and a base terminal, which is connected to a predetermined reference-ground potential.
A first resistor is preferably provided between the emitter terminal of the tracking transistor and the input of the tracking circuit.
Furthermore, a second resistor is preferably provided between the collector terminal of the tracking transistor and a supply voltage terminal of the tracking circuit.
In a particularly preferred embodiment of the tracking circuit according to the invention, a diode for increasing the breakdown voltage of the tracking transistor is provided between the first resistor and the emitter terminal of the tracking transistor.
The integrated transistor is preferably fabricated in a BICMOS fabrication process.
The integrated bipolar transistor is preferably a PNP bipolar transistor.
In an alternative embodiment, the integrated transistor is an NPN bipolar transistor.
In an alternative embodiment, the integrated transistor is a MOSFET surrounded by an insulation well.
The insulation well is preferably constructed from a plurality of layers having different doping strengths.
The integrated transistor is preferably a driver transistor of an ADSL driver circuit.
The breakdown voltage between the integrated transistor and the insulation well is preferably about 18 volts.
The breakdown voltage between the insulation well and the substrate is preferably about 30 volts.
The supply voltage which can be applied to the integrated transistor is preferably about 24 volts.
Preferred embodiments of the tracking circuit according to the invention are described below with reference to the accompanying figures in order to elucidate features that are essential to the invention.